CST (Computer SimulationTechnology) recentlysigned a joint-marketingagreement with CadenceDesign Systems. Cadence andCST are collaborating to offeran effective workflow for PCBand package-layout ...
Three independent design processes – chip, package, and PCB – are typically required for the latest electronic products which utilize increasingly complex systems on chip (SoCs) and multiple chips in ...
eASIC and Computer Simulation Technology (CST) to demonstrate up to 5x reduction in co-simulation time for multi-level PCB package design Santa Clara, CA – October 29, 2013 – eASIC® Corporation, ...