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Draw the State Transition Diagram or Finite State Machine for this diagram below, which is a part of a 4-bit computer.Note: The rectangles represent the instructions for the controller.STARTAC = accumulatorAR = address registerDR = data registerIR = instruction registerM = memory dataN = negative flagLOAD IR, ARPC = PC 1ERRORLOADDR = M[AR]DR -> ACDR -> M[AR] -> M[AR] -> M[AR]AC -> DRM[AR] = M[AR] - DRAC = AC - DRPC = ARC -> ARC AND DR -> ACR -> ARC XOR DR -> ACFigure 2: Flowchart of CPU operat
Draw the State Transition Diagram or Finite State Machine for this dia…
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